• ADS1263 Enterprise Version 32Bit ADC Module Analog to Digital Converter without Shielding Case
  • ADS1263 Enterprise Version 32Bit ADC Module Analog to Digital Converter without Shielding Case

ADS1263 Enterprise Version 32Bit ADC Module Analog to Digital Converter without Shielding Case

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ADS1263 Enterprise Version 32Bit ADC Module Analog to Digital Converter without Shielding Case

Features:

* Resolution: 32-bit
* Number of channels: 5 differential/11 single-ended
* Maximum sample rate: 38ksps
* Differential input voltage: ±VREF/Gain
* Programmable gain: 1-32

Package Included:
* 1 x ADC module

Functional framework diagram:



Version Comparison:
The difference between ADS1262 and ADS1263: ADS1263 integrates a 24-bit auxiliary delta-sigma ADC dedicated to background measurements. There is no difference in accuracy!


Advantages:
* 32bit ADC: At Data Rate = 20 SPS, the noise is only 0.16uVP-P, which is excellent compared to those of a 24-bit ADC. ADS1263 integral non-linearity (INL) can be up to 13 ppm. In addition, the gain error (GE) of PGA is ±300ppm maximum. However, ADS1263 is fully rated for operation from -40°C to +125°C. Therefore, both INL and GE are designed to be compatible with temperature stability and long-term operation stability.
* To effectively reduce voltage noise, a clean LDO power supply with high PSRR and low ripple must be used. An anti-aliasing filter that uses a metal film resistor and MLCC as signal inputs is adopted. This reduces electrical noise from resistors and capacitors. When designing a PCB, the balanced layout of the thermal components and the placement of the decoupling capacitors are very important, especially the correct decoupling of the REF pin (the 8th pin of the chip) to achieve optimal performance.
* Reference design: Strictly follow the reference design requirements of the manual.
* Reference chip: A low-drift precision reference chip is used, and the reference output pin uses a capacitor with a large ESR to store enough charge to ensure the stability of the reference voltage when the ADC's internal conversion capacitor is extracted. If there is no buffer inside the chip,  users will also need to add a low-noise follower as a buffer.
* Single-point grounding: The complete separation of analog ground and digital ground and the last single point of access to the power ground prevent the ground signals from being cross-linked with each other and bringing noise into the signal link.
* High-quality linear power supply: Noise from the power supply can reduce the effective resolution of the data converter if it contaminates signal input sources. A LDO chip with a high power supply rejection ratio and low ripple produces a clean and stable voltage rail to power the analog components. This is helpful for precision signaling systems.
* Pre-filter: low-temperature drifting metal film resistor + C0G multilayer ceramic capacitor constitute a low-pass filter. This improves total harmonic distortion, reduces resistive and capacitive electronic thermal noise, and provides the ADC with an excellent anti-aliasing filter that avoids aliasing noise contaminating the signal. At the same time, it eliminates the effects of overdrive signals outside of the filter bandwidth.
* PCB heat dissipation: The high-density use of vias in the copper area of the PCB forms an array to improve longitudinal Z heat dissipation and allow the components on the heating surface to cool down quickly. This can effectively avoid the concentration of hot spots on the PCB, and reduce the on-chip reference drift caused by the temperature rise.

Performance Tests:



Application:


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