KINTEX7 EDA-EVAL XC7K-160T Master Chip Development Board for FPGA Teaching Platform EDA Learning

KINTEX7 EDA-EVAL XC7K-160T Master Chip Development Board for FPGA Teaching Platform EDA Learning

160T Master Chip and Memory Parameters:
- Master chip model: XC7K160T-2FFG6761
- Chip level: industrial
- Clock recommended maximum speed: PLL/MMCM recommended maximum 709M
- Onboard DDR memory specification: MT41K256M16TW-107, 16bit 512MB (bytes), 1600M
- Logic unit (LC): 162, 240
- Lookup table (LUT): 25, 350
- Trigger (CLB): 202, 800
- DSP Slices: 600pcs
- Block Ram: 11, 700Kbit
- Component temperature range: industrial -40 ~ 85℃
- Speed level: -2
- GTH number: 8 pair of GTX transceiver

Development Function Interface Parameter Description:
- Clock resources: 50M/20PPM single ended system clock; 156.25M/20PPM GTX reference clock
- For PS2 interface: a computer mouse keyboard device interface that can be used for PS2
- Ethernet: a gigabit RGMII, model of RTL8211E-VB
- GTX high speed interface: four SMA interfaces lead to a pair of GTX transceivers TX0 and RX0
- UART: a Type-C USB to serial JTAG, CH340 chip
- JTAG download debugger: a Type-C USB to JTAG converter that can complete download and debugging
- Configuration memory: a 32M FLASH used to start configuring FPGA BIT
- FLASH memory: a 32M FLASH that can be accessed by users writing FPGA code
- LED light: PG/DONE indicator light, 12 LEDs, three RGB tri-color LEDs
- Dial switch: one ADJ power selection switch, 12 digital quantity 01 input switches
- Button: one system reset/reconfigure button, 5 FPGA input buttons
- ADC interface: 2-channel serial SPI interface independent ADC, with a maximum sampling rate of 1MSPS
- DAC interface: 2-channel serial SPI interface independent DAC, with a maximum output of approximately 1MSPS
- SD interface: an SD interface for a TF card slot, supporting TF cards and SDIO/SPI modes
- Audio interface: an ADAU1761 that supports headphone input/output/speaker output
- Buzzer: a passive buzzer that can output audio at different frequencies
- RGB LCD: a 40P-FPC0.5 flip top with LCD RGB screen interface connected underneath
- HDMI-compatible input: one HDMI-compatible input, ADV7611 chip, supports up to 1080P
- HDMI-compatible output: one HDMI-compatible output, FPGA IO direct connection, maximum overclocking support 1080P
- EEPROM: onboard 24C02 EEPROM with I2C interface
- LED: 2pcs four segment common cathode LED, in red
- Expansion IO pin: a 2.54 pitch 40 pin dual row expansion port, voltage of 2.5V/3.3V
- Note 1: Expansion IO pin is located at BANK15, with 34 IOs available for single ended use or as 17 pairs of differential.
- Note 2: Expansion IO can be configured with 2.5V/3.3V voltage through the VOT ADJ dip switch in the bottom left corner.
- Note 3: If differential is required for expansion IO, the ADJ voltage configuration is 2.5V and supports LVDS_25.

Package Included:
- 1 x Development Board
- 2 x Type-C Data Cable
- 2 x SMA Male Connector Cable (15cm)
- 1 x 9V/2A Type-C Power Adapter (used for development board only)

Note:
- Please contact our customer service to get development resources after receiving the product.