PX Logic 32 USB3.0 Super High Speed Logic Analyzer 2-Channel PWM Output Compatible with Win/Mac/Linux

PX Logic 32 USB3.0 Super High Speed Logic Analyzer 2-Channel PWM Output Compatible with Win/Mac/Linux

Project Opensource Address:
- https://github.com/PXLogic/PXView
- If you need to compile a Linux version, please compile it yourself.
- Opensource protocol: GPL V3.

Highlights:
- 4Gbit storage depth
- 1Gsps high sampling rate
- USB3.0 5Gbps
- 200+ decoding protocol
- 2-Channel PWM output
- 0-6V threshold input
- External trigger
- Trigger output
- Multiple hardware filtering
- RLE compress algorithm
- Aluminum alloy shielding shell
- For Win/Mac/Linux

Features:
- PX Logic 32 adopts a 17Gbps (160%) redundant bandwidth design, and with the support of this design, all sampling configuration settings can be stably and reliably used for data acquisition and analysis.
- Trigger option: The flat design of the trigger button provides a more comfortable visual effect and allows for more effortless operation. The triggering logic supports nowhere to trigger, rising edge, falling edge, high level, low level, bilateral triggering, supports multiple channel "AND" and "OR", as well as advanced triggering conditions and functions such as protocol triggering.
- Cursor measurement: Mouse following measurement, real-time display of the current signal's pulse width, period, frequency, and duty cycle.
- Label measurement: It can measure any time period and support data parsing and searching between any two labels.

Specification:
- Model: PX Logic 32
- Channel number: 32CH
- USB interface: USB3.0 (Type-C support forward and backward insertion)
- Buffer mode maximum sampling rate: 1Gsps/8ch; 500Msps/16ch; 250Msps/32ch
- Stream mode maximum sampling rate: 1Gsps/2ch; 500Msps/4ch; 200Msps/8ch; 100Msps/16ch; 50Msps/32ch
- Minimum acquisition pulse width: 1ns
- Highest acquisition frequency: 500MHz
- Maximum hardware storage depth: 4G (bit)
- Data caching mode: Buffer (higher sampling rate)/Stream (longer sampling time)
- Maximum sampling depth:
  Buffer Mode: 4G (Bit)
  Stream Mode: depends on computer RAM capacity, up to 128G (Byte)/1024G (Bit)
- Maximum sampling time:
  Buffer Mode: 1Gsps/4 seconds at 1ch; 500Msps/8 seconds at 1ch; 250Msps/16 seconds at 1ch
  Stream Mode: 1Gsps/17min and 4s at 1ch; 500Msps/34min and 8s at 1ch; 200Msps/85min and 20s at 1ch; 100Msps/170min and 40s at 1ch
- Trigger type:
  Internal trigger: rising edge/high level/falling edge/low level/arbitrary edge, up to 32 channels can be triggered simultaneously.
  External trigger: rising edge/high level/falling edge/low level/arbitrary edge, dedicated hardware IO trigger input for external device synchronization.
  Trigger output: trigger signal output to IO for external device synchronization.
- Protocol support: 200+ protocols (open protocol decoding library, customizable protocols)
- Input withstand voltage: ±40V
- Input impedance: 200K/1pf
- Threshold value: 0 - 6V (0.1V step)
- Waveform output: 2 channel PWM/2MHz (this function will be activated through OTA in the future)
- Channel interface: 2.54mm DuPont cable interface (50Pin for Nextron, 3U gold-plated JTAG)
- Power supply voltage: 5V/USB power supply
- Power supply current: 300mA (at 5V)
- Power supply power: 1.5W
- Size: 80 x 74 x 13.5mm
- Working temperature: 0 - 65℃ (non-condensing)

Buffer Mode Max 1Gsps/8ch:
- Buffer Mode (internal hardware cache): Using the internal DRAM of the logic analyzer as the sampling buffer, data is uploaded to the computer after sampling is completed. This mode can provide a higher sampling rate.

Stream Mode Max 1Gsps/2ch:
- Stream Mode (PC Memory Cache): Using computer memory to store sampling data, which needs to be uploaded to the computer in real time. This mode can provide a larger sampling depth.
- In this mode, it supports up to 128GB (1024Gbit) of memory and theoretically can record data for nearly 17 minutes under a single channel 1Gsps sampling.

Package Included:
- 1 x Logic Analyzer
- 1 x USB 3.0 Data Cable
- 1 x Storage Bag