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XILINX FPGA Development Board XC3S500E Spartan-3E Core Board Minimum System Board
Introduction
- Core3S500E is a master chip based XC3S500E as core board , its most important feature:
- Onboard 1pcs XCF04S
- Onboard FPGA 's basic circuitry, including the crystal oscillator circuit , etc.
- Onboard nCONFIG button , RESET button , 4 x LED
- Leads to all I / O resources
- Download with JTAG debug interfaces
- Pin pitch 2.0mm, small size, suitable for access to the user's system
Chip Introduction
- XC3S500E
- The following is a core resource parameters XC3S500E of :
- Operating frequency : 50MHz;
- Operating voltage : 1.15V ~ 3.3V;
- Pack : QFP208; I / O ports : 116 ;
- Les: 500K; RAM: 360kb;
- DCMs: 4;
- Debugging Download : Download can be achieved through the JTAG interface.
- AMS1117-3.3 (PCB back )
- 3.3V regulator device .
- AMS1117-2.5 (PCB back )
- 2.5V regulator device .
- AMS1117-1.2 (PCB back )
- 1.2V regulator device .
- XCF04S (PCB back )
- Serial FLASH memory for storing code.
Other Device Profile
- Power LED
- User LED
- LED chip initialization flag
- Reset button
- nCONFIG button
- Can reconfigure the FPGA chip , which is equivalent to restart the power supply.
- 50M active crystal (PCB back )
Interface Overview
- JTAG Interface
- Support download and debug .
- FPGA pin interface
- Leads to VCC, GND , and all I / O, convenience and peripherals to connect.